Pin |
Symbol |
Function |
1 |
NC |
No connection |
2 |
VCC |
Power voltage |
3 |
VCCI |
Power supply for digital I/O pins. |
4 |
NC |
No connection |
5 |
GRB |
Global reset pin. When GRB is “L”, internal initialization procedure is executed |
6 |
DISP |
Display on/off |
7 |
GND |
Power Ground |
8 |
RXIN0- |
LVDS input lane: RX0-/ RX0+ |
9 |
RXIN0+ |
10 |
GND |
Power Ground |
11 |
RXIN1- |
LVDS input lane: RX1-/ RX1+ |
12 |
RXIN1+ |
13 |
GND |
Power Ground |
14 |
RXIN2- |
LVDS input lane: RX2-/ RX2+ |
15 |
RXIN2+ |
16 |
GND |
Power Ground |
17 |
RXCLKIN- |
LVDS input lane, detail pin define please refer to LVDS Input Pin Mapping Table. |
18 |
RXCLKIN+ |
19 |
GND |
Power Ground |
20 |
RXIN3- |
LVDS input lane: RX3-/ RX3+ |
21 |
RXIN3+ |
22 |
GND |
Power Ground |
23-24 |
NC |
No connection |
25 |
FMT |
LVDS_FMT sets LVDS data format.
LVDS_FMT |
Function Description |
L |
VESA Mode (Default) |
H |
JEIDA Mode |
LVDS_FMT is not used in RGB interface and should be connected to “L”. |
26-27 |
NC |
No connection |
28 |
SELB |
SELB sets VSYNC polarity in RGB interface and sets LVDS 3- / 4- lane in LVDS interface.
MCU Type |
VDPOL |
Function Description |
RGB interface |
L |
VSYNC polarity: positive |
H |
VSYNC polarity: positive: negative (Default) |
LVDS inteface |
L |
LVD 3 lane |
H |
LVD 4 lane (Default) |
|
29 |
NC |
No connection |
30 |
GND |
Power Ground |
31-32 |
VLED- |
Power for LED backlight (Cathode) |
33 |
L/R |
Horizontal scan direction control pin. This pin must be connected to “H” or “L” according to system application
HDIR |
Function Description |
L |
From right to left |
H |
From left to right (Default) |
|
34 |
U/D |
Vertical scan direction control pin. This pin must be connected to “H” or “L” according to system application.
VDIR |
Function Description |
L |
From down to up. |
H |
From up to down.(Default) |
|
35 |
NC |
No connection |
36-37 |
GND |
Power Ground |
38 |
NC |
No connection |
39-40 |
VLED+ |
Power for LED backlight (Anode) |