- Spécification
- Fonction des broches d’interface
- Dessin de contour
- Valeurs absolues maximales
- Paramètres électriques
| Article | Dimensions | Unité |
|---|---|---|
| Structure | COG | |
| Taille (diagonale) | 0.84 | pouces |
| Résolution matricielle | 96 × 16 | points |
| Dimensions du module | 29.1 × 9.2 × 1.26 | mm |
| Surface de visée (VA) | 23.104 × 5.504 | mm |
| Aire active (AA) | 21.104 × 3.504 | mm |
| Taille de point et de pixel | 0.198 × 0.198 | mm |
| Espacement de point et de pixel | 0.220 × 0.220 | mm |
| Couleur émise | OLED, Blanc / Jaune / Bleu ciel | |
| Mode d’affichage | Matrice passive | |
| IC | SSD1306 | |
| Interface | I2C | |
| Tension d’alimentation | 3V | |
| Duty | 1/16 cycle de service | |
| Température de fonctionnement | -40~+80 | °C |
| Température de rangement | -40~+85 | °C |
| Type de polariseur | Polariseur optionnel | |
| Type | Affichage OLED graphiques |
| Pin No. | Symbole | Fonction |
|---|---|---|
| 1 | C2N | Positive Terminal of the Flying Inverting CapacitorNegative Terminal of the Flying Boost CapacitorThe charge-pump capacitors are required between the terminals. They must be floated when the converter is not used. |
| 2 | C2P | |
| 3 | C1P | |
| 4 | C1N | |
| 5 | VBAT | Power Supply for DC/DC Converter Circuit This is the power supply pin for the internal buffer of the DC/DC voltage converter. It must be connected to external source when the converter is used. It should be connected to VDD when the converter is not used. |
| 6 | NC | No connection |
| 7 | VSS | Ground of Logic Circuit This is a ground pin. It acts as a reference for the logic pins. It must be connected to external ground. |
| 8 | VDD | Power Supply for Logic This is a voltage supply pin. It must be connected to external source. |
| 9 | RES# | Power Reset for Controller and Driver This pin is reset signal input. When the pin is low, initialization of the chip is executed. |
| 10 | SCL | I2C mode is selected, D2, D1 should be tied together and serve as SDAout, SDAin inapplication and D0 is the serial clock input, SCL. |
| 11 | SDA | |
| 12 | IREF | Current Reference for Brightness Adjustment This pin is segment current reference pin. A resistor should be connected between this pin and VSS. Set the current lower than 12.5μA. |
| 13 | VCOMH | Voltage Output High Level for COM Signal This pin is the input pin for the voltage output high level for COM signals. A capacitor should be connected between this pin and VSS. |
| 14 | VCC | Power Supply for OEL Panel This is the most positive voltage supply pin of the chip. A stabilization capacitor should be connected between this pin and VSS when the converter is used. It must be connected to external source when the converter is not used. |
| Paramètre | Symbole | Min | Max | Unité |
|---|---|---|---|---|
| Tension d’alimentation pour le circuit logique | VDD | 0 | 4 | V |
| Tension d’alimentation pour l’affichage | VCC | 0 | 16 | V |
| Température de fonctionnement | TOP | -40 | +70 | °C |
| Température de rangement | TSTG | -40 | +85 | °C |
| Élément | Symbole | Condition | Min | Typ | Max | Unité |
|---|---|---|---|---|---|---|
| Tension d’alimentation pour le circuit logique | VDD | － | 2.8 | 3.0 | 3.3 | V |
| Tension d’alimentation pour l’affichage (Supplied Externally) | VCC | － | 7.0 | 7.5 | 7.8 | V |
| Charge Pump Regulator Supply Voltage | VBAT | － | 3.3 | － | 4.2 | V |
| Charge Pump Output Voltage for Display (Generated by Internal DC/DC) | Charge Pump VCC |
－ | 7.0 | 7.5 | 7.8 | V |
| Tension d’alimentation élevée | VIH | － | 0.8×VDD | － | VDD | V |
| Tension d’alimentation basse | VIL | － | 0 | － | 0.2×VDD | V |
| Tension de sortie élevée | VOH | － | 0.9×VDD | － | VDD | V |
| Tension de sortie basse | VOL | － | 0 | － | 0.1×VDD | V |
| Vérification de 50 % du courant de fonctionnement (VCC Supplied Externally) | ICC | － | － | 7 | 15 | mA |
| Vérification de 50 % du courant de fonctionnement (VCC Generated by Internal DC/DC) | IBAT | － | 10 | 15 | 25 | mA |
