- Allgemeine Spezifikationen
- Schnittstelle Pin-Funktion
- Zeichnung
- Absolute Grenzwerte
- Elektrische Eigenschaften
| Artikel | Ausmaß | Einheit |
|---|---|---|
| Bauweise | COG | |
| Größe (Diagonale) | 3.75 | Zoll |
| Punktmatrix (Auflösung) | 240 × 128 Punkte | Punkte |
| Abmaße der modul | 98.7 × 67.7 × 9.5 (MAX) | mm |
| Anzeigebereich (VA) | 92.0 × 53.0 | mm |
| Aktiver Bereich (AA) | 83.975 × 44.775 | mm |
| Punktgröße | 0.325 × 0.325 | mm |
| Punktabstand | 0.35 × 0.35 | mm |
| IC | UC1608 oder gleichwertig | |
| Schnittstelle | 6800 / 8080 /SPI | |
| Stromversorgung | 3V | |
| Duty | 1/128 duty cycle | |
| Typ | LCD-Grafikdisplay / Grafikmodul / COG LCD-Anzeige |
| Pin No. | Symbol | Type | Beschreibung |
|---|---|---|---|
| 1 | VB1- | PWR | LCD Bias Voltages. These are the voltage source to provide SEG driving currents. These voltages are generated internally. Connect capacitors of CBX between VBX+ and VBX–. The resistance of these four traces directly affects the SEG driving strength of the resulting LCD module. Minimize the trace resistance is critical in achieving high quality image. |
| 2 | VB1+ | ||
| 3 | VB0- | ||
| 4 | VB0+ | ||
| 5 | VLCD | PWR | Main LCD Power Supply. Connect these pins together. |
| 6 | VBIAS | I | This is the reference voltage to generate the actual SEG driving voltage. VBIAS can be used to fine tune VLCD by external variable resistors. Internal resistor network has been provided to simplify external trimming circuit. In COF application, connect a small bypass capacitor between VBIAS and VSS to reduce noise. |
| 7 | VSS | PWR | Ground |
| 8 | VDD | PWR | Supply Voltage for logic |
| 9 | D7 | I/O | Bi-directional bus for both serial and parallel host interfaces. In serial modes, connect D[0] to SCK, D[3] to SDA, Connect unused pins to VDD or VSS. |
| 10 | D6 | ||
| 11 | D5 | ||
| 12 | D4 | ||
| 13 | D3 | ||
| 14 | D2 | ||
| 15 | D1 | ||
| 16 | D0 | ||
| 17 | WR1 | I | WR[1:0] controls the read/write operation of the host interface. See Host Interface section for more detail. In parallel mode, WR[1:0] meaning depends on whether the interface is in the 6800 mode or the 8080 mode. In serial interface modes, these two pins are not used, connect them to VSS. |
| 18 | WR0 | ||
| 19 | CD | I | Select Control data or Display data for read/write operation. In S9 mode, CD pin is not used. Connect CD to VSS when not used. ”L”: Control data ”H”: Display data |
| 20 | RST | I | When RST=”L”, all control registers are re-initialized by their default states. Since UC1608x has built-in Power-ON-Reset and Software Reset command, RST pin is not required for proper chip operation. When RST is not used, connect the pin to VDD. |
| 21 | CS | I | Chip Select. The chip is selected when CS=”H”. When the chip is not selected, D[7:0] will be high impedance. |
| 22 | BM0 | I | Bus mode: The interface bus mode is determined by BM[1:0] and D[7:6] by the following relationship |
| Artikel | Symbol | Mindestwert | typischer Wert | Maximalwert | Einheit |
|---|---|---|---|---|---|
| Température de fonctionnement | TOP | -20 | － | +70 | ℃ |
| Température de rangement | TST | -30 | － | +80 | ℃ |
| Logic supply voltage | VDD | -0.3 | － | +4.0 | V |
| LCD Generator supply voltage | VDD2 | -0.3 | － | +4.0 | V |
| LCD Generated voltage | VLCD | -0.3 | － | +17.0 | V |
| Artikel | Symbol | Betriebsbedingungen | Mindestwert | typischer Wert | Maximalwert | Einheit |
|---|---|---|---|---|---|---|
| Tensión de Alimentación para Lógica | VDD-VSS | － | 2.7 | 2.8~3.3 | 3.6 | V |
| Tensión de Alimentación para LCM | VLCD | Ta=-20℃ Ta=25℃ Ta=70℃ |
－ 15.2 － |
－ 15.5 － |
－ 15.8 － |
V V V |
| Eingangshochspannung | VIH | － | 0.8 VDD | － | － | V |
| Eingangsniederspannung | VIL | － | － | － | 0.2 VDD | V |
| Ausgangshochspannung | VOH | － | 0.8 VDD | － | － | V |
| Ausgangsniederspannung | VOL | － | － | － | 0.2 VDD | V |
| Corriente de Alimentación(No include LED Backlight) |
IDD | VDD=3.0V | － | 1.1 | － | mA |
