- Specifiche generali
- Funzione dei Pin di Interfaccia
- Disegno
- Valori massimi assoluti
- Caratteristiche elettriche
| Articolo | Dimensioni | Unità |
|---|---|---|
| Struttura | COG | |
| Dimensione (Diagonale) | 0.49 | pollici |
| A matrice di punti (Risoluzione) | 64 × 32 | punti |
| Dimensione del modulo | 14.5 × 11.6 × 1.26 | mm |
| Area di visualizzazione (VA) | 12.58 × 6.58 | mm |
| Area attiva (AA) | 11.18 × 5.58 | mm |
| Dimensioni del Dot | 0.153 × 0.153 | mm |
| Passo del Dot | 0.175 × 0.175 | mm |
| Colore di emissione | OLED, Bianco / Giallo | |
| Modalità display | Matrice passiva | |
| IC | SSD1306 | |
| Interfaccia | I2C | |
| Alimentatore | 3V | |
| Duty | 1/32 Duty | |
| Temperatura di lavoro | -40~+80 | °C |
| Temperatura di stock | -40~+85 | °C |
| Polarizer Type | polarizzatore opzionale | |
| Type | Modulo display OLED grafico, OLED microdisplay |
| Pin No. | Simbolo | Descrizione |
|---|---|---|
| 1 | C2N | Positive Terminal of the Flying Inverting Capacitor Negative Terminal of the Flying Boost Capacitor The charge-pump capacitors are required between the terminals. They must be floated when the converter is not used. |
| 2 | C2P | |
| 3 | C1P | |
| 4 | C1N | |
| 5 | VBAT | Power Supply for DC/DC Converter Circuit This is the power supply pin for the internal buffer of the DC/DC voltage converter. It must be connected to external source when the converter is used. It should be connected to VDD when the converter is not used. |
| 6 | NC | No connection. |
| 7 | VSS | Ground of Logic Circuit This is a ground pin. It acts as a reference for the logic pins. It must be connected to external ground. |
| 8 | VDD | Power Supply for Logic This is a voltage supply pin. It must be connected to external source. |
| 9 | RES# | Power Reset for Controller and Driver This pin is reset signal input. When the pin is low, initialization of the chip is executed. |
| 10 | SCL | Host Data Input/Output BusWhen serial mode is selected, D1 will be the serial data input SDIN and D0 will be the serial clock input SCLK. When I2C mode is selected, D2 & D1 should be tired together and serve as SDAout & SDAin in application and D0 is the serial clock input SCL. |
| 11 | SDA | |
| 12 | IREF | This is segment output current reference pin. When external IREF is used, a resistor should be connected between this pin and Vss to maintain the IREF current at a maximum of 30uA. When internal IREF is used, this pin should be kept NC. |
| 13 | VCOMH | Voltage Output High Level for COM Signal This pin is the input pin for the voltage output high level for COM signals. A capacitor should be connected between this pin and VSS. |
| 14 | VCC | Power Supply for OEL Panel This is the most positive voltage supply pin of the chip. A stabilization capacitor should be connected between this pin and VSS when the converter is used. It must be connected to external source when the converter is not used. |
| Articolo | Simbolo | Valore Min | Valore massimo | Unità |
|---|---|---|---|---|
| Tensione di alimentazione per logica | VDD | 0 | 4.0 | V |
| Tensione di alimentazione per display | VCC | 0 | 15.0 | V |
| Temperatura di lavoro | TOP | -40 | +80 | ℃ |
| Temperatura di stock | TSTG | -40 | +85 | ℃ |
| Articolo | Simbolo | Condizioni | Valore Min | Valore tipico | Valore massimo | Unità |
|---|---|---|---|---|---|---|
| Tensione di alimentazione per logica | VDD | - | 2.8 | 3.0 | 3.3 | V |
| Tensione di alimentazione per display | VCC | - | 7.0 | 7.5 | 7.8 | V |
| Tensione di ingresso elevata | VIH | - | 0.8×VDD | - | VDDIO | V |
| Tensione di ingresso bassa | VIL | - | 0 | - | 0.2×VDD | V |
| Tensione di uscita elevata | VOH | - | 0.9×VDD | - | VDDIO | V |
| Tensione di uscita bassa | VOL | - | 0 | - | 0.1×VDD | V |
| 50% Check Board Operating Current | ICC | VCC=7.5V | - | 5.0 | 20.0 | mA |
