- Especificación
- Función Interfaz Pin
- Dibujo del Contorno
- Valores Nominales Máximos Absolutos
- Características Electrónicas
| Elemento | Dimensión | Unidad |
|---|---|---|
| Estructura | COG + Marco | |
| Tamaño (Diagonal) | 2.7 | pulgada |
| Matriz de puntos (Resolución) | 128 × 64 | dots |
| Dimensión del módulo | 89.7 × 47.20 × 3.40 | mm |
| zona activa(AA) | 61.41 × 30.69 | mm |
| Tamaño del punto | 0.45 × 0.45 | mm |
| Distancia entre puntos | 0.48 × 0.48 | mm |
| Color de Emisión | OLED, Blanco / Amarillo | |
| Admite Escala de Grises | Sí | |
| Modo de visualización | Matriz Pasiva | |
| Escala de Grises | 4 bits | |
| IC | SSD1357 | |
| Interfaz | 6800,8080,4-Line SPI,I2C | |
| Deber | 1/64 Deber | |
| Temperatura de funcionamiento | -40~+80 | °C |
| Temperatura de almacenamiento | -40~+85 | °C |
| Tipo | Pantalla Gráfica OLED |
| No. | Símbolo | Función | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | NC(GND) | No connection. | |||||||||||||||
| 2 | VSS | Ground of Logic Circuit. This is a ground pin. It also acts as a reference for the logic pins. It must be connected to external ground. |
|||||||||||||||
| 3 | VCC | Power supply for panel driving voltage. This is also the most positive power voltage supply pin. | |||||||||||||||
| 4 | VCOMH | Voltage Output High Level for COM Signal. This pin is the input pin for the voltage output high level for COM signals. A tantalum capacitor should be connected between this pin and VSS. |
|||||||||||||||
| 5 | VLSS | Ground of Analog Circuit These are the analog ground pins. They should be connected to VSS externally. |
|||||||||||||||
| 6~13 | D7~D0 | These pins are bi-directional data bus connecting to the MCU data bus. Unused pins are recommended to tie LOW. When serial interface mode is selected, D0 will be the serial clock input: SCLK; D1 will be the serial data input: SDIN and D2 should be kept NC. When I2C mode is selected, D2, D1 should be tied together and serve as SDAout, SDAin in application and D0 is the serial clock input, SCL. |
|||||||||||||||
| 14 | E/RD# | This pin is MCU interface input. When 6800 interface mode is selected, this pin will be used as the Enable (E) signal. Read/write operation is initiated when this pin is pulled HIGH and the chip is selected. When 8080 interface mode is selected, this pin receives the Read (RD#) signal. Read operation is initiated when this pin is pulled LOW and the chip is selected. When serial or I2C interface is selected, this pin must be connected to VSS. |
|||||||||||||||
| 15 | R/W# | This pin is read / write control input pin connecting to the MCU interface. When 6800 interface mode is selected, this pin will be used as Read/Write (R/W#) selection input. Read mode will be carried out when this pin is pulled HIGH and write mode when LOW. When 8080 interface mode is selected, this pin will be the Write (WR#) input. Data write operation is initiated when this pin is pulled LOW and the chip is selected. When serial or I2C interface is selected, this pin must be connected to VSS. |
|||||||||||||||
| 16 17 |
BS1 BS2 |
Communicating Protocol Select. These pins are MCU interface selection input. See the following table:
|
|||||||||||||||
| 18 | D/C# | This pin is Data/Command control pin connecting to the MCU. When the pin is pulled HIGH, the data at D[7:0] will be interpreted as data. When the pin is pulled LOW, the data at D[7:0] will be transferred to a command register. In I2C mode, this pin acts as SA0 for slave address selection. When 3-wire serial interface is selected, this pin must be connected to VSS. |
|||||||||||||||
| 19 | CS# | Chip Select This pin is the chip select input. The chip is enabled for MCU communication only when CS# is pulled low. |
|||||||||||||||
| 20 | RES# | This pin is reset signal input. When the pin is pulled LOW, initialization of the chip is executed. Keep this pin pull HIGH during normal operation. |
|||||||||||||||
| 21 | FR | Frame Frequency Triggering Signal This pin will send out a signal that could be used to identify the driver status. Nothing should be connected to this pin. It should be left open individually. |
|||||||||||||||
| 22 | IREF | This pin is the segment output current reference pin. IREF is supplied externally. |
|||||||||||||||
| 23 | N.C. | Reserved Pin The N.C. pin between function pins is reserved for compatible and flexible design. |
|||||||||||||||
| 24 | VDD | Power Supply for I/O Pin. This pin is a power supply pin of I/O buffer. It should be connected to VCI or external source. All I/O signal should have VIH reference to VDDIO. When I/O signal pins (BS0~BS1, D0~D7, control signals…) pull high, they should be connected to VDDIO. |
|||||||||||||||
| 25 | VP | Power Supply for Core Logic Circuit This is a voltage supply pin. It can be supplied externally (within the range of 2.4~2.6V) or regulated internally from VCI. A capacitor should be connected between this pin & VSS under all circumstances. |
|||||||||||||||
| 26 | VDD | Power Supply for Operation. This is a voltage supply pin. It must be connected to external source & always be equal to or higher than VDD & VDDIO. |
|||||||||||||||
| 27 | VSL | Voltage Output Low Level for SEG Signal This is segment voltage (output low level) reference pin. This pin has to connect with resistor and diode to ground (details depends on application). |
|||||||||||||||
| 28 | VLSS | Ground of Analog Circuit These are the analog ground pins. They should be connected to VSS externally. |
|||||||||||||||
| 29 | VCC | Power Supply for OEL Panel These are the most positive voltage supply pin of the chip. They must be connected to external source. |
|||||||||||||||
| 30 | NC(GND) | No connection |
| Parámetro | Símbolo | Mínimo | Máximo | Unidad |
|---|---|---|---|---|
| Tensión de Alimentación para lógica | VDD | -0.3 | 4 | V |
| Tensión de alimentación de la pantalla | VCC | 0 | 15 | V |
| Temperatura de funcionamiento | TOP | -40 | +80 | °C |
| Temperatura de almacenamiento | TSTG | -40 | +85 | °C |
| Artículo | Símbolo | Condición | Mínimo | Tipo | Máximo | Unidad |
|---|---|---|---|---|---|---|
| Tensión de Alimentación para lógica | VDD | － | 1.65 | 3.0 | 3.3 | V |
| Tensión de Alimentación para lógica | VCC | － | 8.0 | 9.0 | 9.5 | V |
| Entrada de alto tensión | VIH | － | 0.8×VDD | － | VDD | V |
| Entrada de baja tensión | VIL | － | － | － | 0.2×VDD | V |
| Alta tensión de salida | VOH | － | 0.9×VDD | － | － | V |
| Baja tensión de salida | VOL | － | － | － | 0.1×VDD | V |
| 50% Check Board operating Current | VCC =9V | － | 31.5 | 47.5 | mA | |
