- Especificación
- Función Interfaz Pin
- Dibujo del Contorno
- Valores Nominales Máximos Absolutos
- Características Electrónicas
| Elemento | Dimensión | Unidad |
|---|---|---|
| Estructura | COG + FR + PCB | |
| Tamaño (Diagonal) | 2.7 | pulgada |
| Matriz de puntos (Resolución) | 128 × 64 | dots |
| Dimensión del módulo | 82.0 × 47.5 × 8.65 | mm |
| Área de visión | 63.41 × 33.69 | mm |
| zona activa(AA) | 61.41 × 30.69 | mm |
| Tamaño del punto | 0.45 × 0.45 | mm |
| Distancia entre puntos | 0.48 × 0.48 | mm |
| Color de Emisión | Blanco / Amarillo | |
| Admite Escala de Grises | Sí | |
| Modo de visualización | Matriz Pasiva | |
| Escala de Grises | 4 bits | |
| IC | SSD1357 | |
| Interfaz | 8-bits 6800 and 8080 paralelo, 4-línea SPI, I2C | |
| PCAP IC | GT911 | |
| PCAP Interfaz | I2C | |
| Puntos de Detección | 1 | Points |
| Pantalla táctil | Panel Táctil Capacitivo | |
| Superficie | Brillo Intenso | |
| Fuente de alimentación | 3V | |
| Deber | 1/64 Deber | |
| Temperatura de funcionamiento | -20~+70 | °C |
| Temperatura de almacenamiento | -30~+80 | °C |
| Tipo de polarizador | Polarizador opcional | |
| Tipo | Pantalla Gráfica OLED, Visualización Táctil OLED |
| No. | Símbolo | Función | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | VSS | This is a ground pin. | |||||||||||||||
| 2 | VDD | Power supply pin for core logic operation | |||||||||||||||
| 3 | NC | Reserved Pin The N.C. pin between function pins is reserved for compatible and flexible design. |
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| 4 | D/C# | This pin is Data/Command control pin connecting to the MCU. When the pin is pulled HIGH, the data at D[7:0] will be interpreted as data. When the pin is pulled LOW, the data at D[7:0] will be transferred to a command register. In I2C mode, this pin acts as SA0 for slave address selection. |
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| 5 | R/W# (WR#) |
This pin is read / write control input pin connecting to the MCU interface. When 6800 interface mode is selected, this pin will be used as Read/Write (R/W#) selection input. Read mode will be carried out when this pin is pulled HIGH and write mode when LOW. When 8080 interface mode is selected, this pin will be the Write (WR#) input. Data write operation is initiated when this pin is pulled LOW and the chip is selected. When serial or I2C interface is selected, this pin must be connected to VSS. |
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| 6 | E/RD# | This pin is MCU interface input. When 6800 interface mode is selected, this pin will be used as the Enable (E) signal. Read/write operation is initiated when this pin is pulled HIGH and the chip is selected. When 8080 interface mode is selected, this pin receives the Read (RD#) signal. Read operation is initiated when this pin is pulled LOW and the chip is selected. When serial or I2C interface is selected, this pin must be connected to VSS. |
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| 7 | DB0 | These pins are bi-directional data bus connecting to the MCU data bus. Unused pins are recommended to tie LOW. When serial interface mode is selected, D0 will be the serial clock input: SCLK; D1 will be the serial data input: SDIN. When I2C mode is selected, D2, D1 should be tied together and serve as SDAout, SDAin in application and D0 is the serial clock input, SCL. |
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| 8 | DB1 | ||||||||||||||||
| 9 | DB2 | ||||||||||||||||
| 10 | DB3 | ||||||||||||||||
| 11 | DB4 | ||||||||||||||||
| 12 | DB5 | ||||||||||||||||
| 13 | DB6 | ||||||||||||||||
| 14 | DB7 | ||||||||||||||||
| 15 | NC | No connection | |||||||||||||||
| 16 | RES# | This pin is reset signal input. When the pin is pulled LOW, initialization of the chip is executed. Keep this pin pull HIGH during normal operation. |
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| 17 | CS# | Chip Select This pin is the chip select input. The chip is enabled for MCU communication only when CS# is pulled low. |
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| 18 | NC | No connection | |||||||||||||||
| 19 | BS2 | Communicating Protocol Select. These pins are MCU interface selection input. See the following table:
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| 20 | BS1 | ||||||||||||||||
| 21 | TP_SCK | I2C clock signal | |||||||||||||||
| 22 | TP_SDA | I2C data signal | |||||||||||||||
| 23 | TP_INT | Interrupt signal, active low, asserted to request Host start a new transaction |
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| 24 | TP_RST | External reset signal, active low |
| Parámetro | Símbolo | Mínimo | Máximo | Unidad |
|---|---|---|---|---|
| Tensión de Alimentación para lógica | VDD | -0.3 | 4.0 | V |
| Temperatura de funcionamiento | TOP | -20 | +70 | °C |
| Temperatura de almacenamiento | TSTG | -30 | +80 | °C |
Características Electrónicas DC
| Artículo | Símbolo | Condición | Mínimo | Tipo | Máximo | Unidad |
|---|---|---|---|---|---|---|
| Tensión de Alimentación para lógica | VDD | － | 2.8 | 3.0 | 3.3 | V |
| Entrada de alto nivel | VIH | － | 0.8×VDD | － | － | V |
| Entrada de bajo nivel | VIL | － | － | － | 0.2×VDD | V |
| Salida de alto nivel | VOH | － | 0.9×VDD | － | － | V |
| Salida de bajo nivel | VOL | － | － | － | 0.1×VDD | V |
| Comprobar la corriente de funcionamiento de la placa 50 % | IDD | VDD =3V | － | 160 | 240 | mA |
