- Spécification
- Fonction des broches d’interfacePin Function
- Dessin de contour
- Valeurs absolues maximales
- Paramètres électriques
| Article | Dimensions | Unité |
|---|---|---|
| Structure | COG | |
| Taille (diagonale) | 0.66 | pouces |
| Résolution matricielle | 64 × 48 | points |
| Dimensions du module | 18.46 × 18.10 × 1.30 | mm |
| Surface de visée (VA) | 15.42 × 12.06 | mm |
| Aire active (AA) | 13.42 × 10.06 | mm |
| Taille de point et de pixel | 0.185 × 0.185 | mm |
| Espacement de point et de pixel | 0.210 × 0.210 | mm |
| Couleur émise | OLED, Blanc / Jaune | |
| Mode d’affichage | Matrice passive | |
| IC | SSD1306 | |
| Interface | 6800 / 8080 / SPI / I2C | |
| Tension d’alimentation | 3V | |
| Duty | 1/48 cycle de service | |
| Température de fonctionnement | -40~+80 | °C |
| Température de rangement | -40~+85 | °C |
| Type de polariseur | Polariseur optionnel | |
| Type | Affichage OLED graphiques |
| No. | Symbole | Fonction | ||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | ESD-GND | It should be connected to ground. | ||||||||||||||||||||
| 2 | C2N | Positive Terminal of the Flying Inverting CapacitorNegative Terminal of the Flying Boost CapacitorThe charge-pump capacitors are required between the terminals. They must be floated when the converter is not used. | ||||||||||||||||||||
| 3 | C2P | |||||||||||||||||||||
| 4 | C1P | |||||||||||||||||||||
| 5 | C1N | |||||||||||||||||||||
| 6 | VBAT | Power Supply for DC/DC Converter Circuit This is the power supply pin for the internal buffer of the DC/DC voltage converter. It must be connected to external source when the converter is used. It should be connected to VDD when the converter is not used. |
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| 7 | VSS | This is a ground pin. | ||||||||||||||||||||
| 8 | VDD | Power supply pin for core logic operation. | ||||||||||||||||||||
| 9 | BS1 | MCU bus interface selection pins. Table : MCU Bus Interface Pin Selection
(1) 0 is connected to VSS (2) 1 is connected to VDD |
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| 10 | BS2 | |||||||||||||||||||||
| 11 | CS# | Chip Select This pin is the chip select input. The chip is enabled for MCU communication only when CS# is pulled low. |
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| 12 | RES# | Power Reset for Controller and Driver This pin is reset signal input. When the pin is low, initialization of the chip is executed. |
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| 13 | D/C# | This is Data/Command control pin. When it is pulled HIGH (i.e. connect to VDD), the data at D[7:0] is treated as data. When it is pulled LOW, the data at D[7:0] will be transferred to the command register. In I2C mode, this pin acts as SA0 for slave address selection. |
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| 14 | R/W# | This is read / write control input pin connecting to the MCU interface. When interfacing to a 6800-series microprocessor, this pin will be used as Read/Write (R/W#) Selection input. Read mode will be carried out when this pin is pulled HIGH (i.e. connect to VDD) and write mode when LOW. |
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| 15 | E/RD# | When interfacing to a 6800-series microprocessor, this pin will be used as the Enable (E) signal. Read/write operation is initiated when this pin is pulled HIGH (i.e. connect to VDD) and the chip is selected. When connecting to an 8080-series microprocessor, this pin receives the Read (RD#) signal. Read operation is initiated when this pin is pulled LOW and the chip is selected. When serial or I2C interface is selected, this pin must be connected to VSS |
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| 16~23 | D0~D7 | These are 8-bit bi-directional data bus to be connected to the microprocessor’s data bus. When serial interface mode is selected, D0 will be the serial clock input: SCLK; D1 will be the serial data input: SDIN. When I2C mode is selected, D2, D1 should be tied together and serve as SDAout, SDAin in application and D0 is the serial clock input, SCL. |
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| 24 | IREF | This pin is segment current reference pin. A resistor should be connected Between this pin and VSS. Set the current lower than 30uA. When internal IREF is used, this pin should be kept NC. |
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| 25 | VCOMH | Voltage Output High Level for COM Signal This pin is the input pin for the voltage output high level for COM signals. A capacitor should be connected between this pin and VSS. |
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| 26 | VCC | Power Supply for OEL Panel This is the most positive voltage supply pin of the chip. A stabilization capacitor should be connected between this pin and VSS when the converter is used. It must be connected to external source when the converter is not used. |
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| 27 | VLSS | This is an analog ground pin. It should be connected to VSS externally. | ||||||||||||||||||||
| 28 | ESD GND | It should be connected to ground. |
| Paramètre | Symbole | Valeur Min | Valeur Max | Unité |
|---|---|---|---|---|
| Tension d'alimentation pour Logique | VDD | 0 | 4.0 | V |
| Tension d'alimentation pour l'affichage | VCC | 0 | 15.0 | V |
| Température Fonctionnement | TOP | -40 | +80 | °C |
| Température Stockage | TSTG | -40 | +85 | °C |
Caractéristiques Électroniques DC
| Article | Symbole | État | Valeur Min | Valeur Type | Valeur Max | Unité |
|---|---|---|---|---|---|---|
| Tension d'alimentation pour Logique | VDD | － | 2.8 | 3.0 | 3.3 | V |
| Tension d'alimentation pour l'affichage (Fourni à l'externe) |
VCC | － | 6.75 | 7.25 | 7.75 | V |
| Charge Pump Regulator Supply Voltage | VBAT | － | 3.0 | － | 4.2 | V |
| Charge Pump Output Voltage for Display (Generated by Internal DC/DC) | Charge Pump VCC |
－ | 7.0 | 7.5 | － | V |
| Entrée Haute Tension | VIH | － | 0.8×VDD | － | VDD | V |
| Entrée Basse Tension | VIL | － | 0 | － | 0.2×VDD | V |
| Sortie Haute Tension | VOH | － | 0.9×VDD | － | VDD | V |
| Sortie Basse Tension | VOL | － | 0 | － | 0.1×VDD | V |
| 50% Check Board Operating Current (VCC Supplied Externally) |
ICC | VCC=7.25V | － | 6.0 | 13.0 | mA |
| 50% Check Board Operating Current (VCC Generated by Internal DC/DC) | IBAT | － | － | 15 | 25 | mA |
