- 仕様
- ピン配置
- 外形図
- 絶対最大定格
- 電気特性
| 項目 | 仕様 | 単位 |
|---|---|---|
| 構造 | COG | |
| サイズ(対角線) | 3.55 | インチ |
| ドットマトリックス / 解像度 | 256 × 64 | ドット |
| モジュール寸法 | 99.20 × 33.50 × 2.01 | mm |
| ビューイングエリア(VA) | 89.52 × 23.28 | mm |
| アクティブエリア(AA) | 87.52 × 21.28 | mm |
| ドットサイズ | 0.312 × 0.303 | mm |
| ドットピッチ | 0.342 × 0.333 | mm |
| 表示色 | OLED, 白色 / 黄色 | |
| グレースケールをサポートする | あり | |
| ディスプレモード | パッシブマトリクス | |
| グレースケール | 4-bit | |
| IC | SSD1322 | |
| インターフェス | 8-bit 6800, 8-bit 8080, 3線式 & 4線式SPI | |
| タッチパネル | なし | |
| 供給電圧 | 3V | |
| Duty | 1/64 duty | |
| 操作温度 | -40~+80 | °C |
| 保存温度 | -40~+85 | °C |
| タイプ | グラフィック型 OLED モジュール |
| Pin Number | 記号 | I/O | 功能 | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | ESD_GND | P | Ground | ||||||||||
| 2 | VSS | P | Ground. | ||||||||||
| 3 | VCC | P | Power supply for panel driving voltage. This is also the most positive power voltage supply pin. |
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| 4 | VCOMH | P | COM signal deselected voltage level. A capacitor should be connected between this pin and VSS. |
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| 5 | VLSS | P | Analog system ground pin. | ||||||||||
| 6~13 | D7~D0 | I/O | Host Data Input/Output Bus These pins are 8-bit bi-directional data bus to be connected to the microprocessor’s data bus. When serial mode is selected, D1 will be the serial data input SDIN and D0 will be the serial clock input SCLK. |
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| 14 | E/RD# | I | Read/Write Enable or Read This pin is MCU interface input. When interfacing to a 68XX-series microprocessor, this pin will be used as the Enable (E) signal. Read/write operation is initiated when this pin is pulled high and the CS# is pulled low. When connecting to an 80XX-microprocessor, this pin receives the Read (RD#) signal. Data read operation is initiated when this pin is pulled low and CS# is pulled low. When serial mode is selected, this pin must be connected to VSS. |
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| 15 | R/W# | I | Read/Write Select or Write This pin is MCU interface input. When interfacing to a 68XX-series microprocessor, this pin will be used as Read/Write (R/W#) selection input. Pull this pin to “High” for read mode and pull it to “Low” for write mode. When 80XX interface mode is selected, this pin will be the Write (WR#) input. Data write operation is initiated when this pin is pulled low and the CS# is pulled low. When serial mode is selected, this pin must be connected to VSS. |
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| 16 | BS0 | I | Communicating Protocol Select These pins are MCU interface selection input. See the following table:
Note (1) 0 is connected to VSS (2) 1 is connected to VDDIO |
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| 17 | BS1 | ||||||||||||
| 18 | D/C# | I | Data/Command Control This pin is Data/Command control pin connecting to the MCU. When the pin is pulled HIGH, the content at D[7:0] will be interpreted as data. When the pin is pulled LOW, the content at D[7:0] will be interpreted as command. |
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| 19 | CS# | I | Data/Command Control This pin is the chip select input connecting to the MCU. The chip is enabled for MCU communication only when CS# is pulled LOW. |
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| 20 | RES# | I | This pin is reset signal input. When the pin is pulled LOW, initialization of the chip is executed. Keep this pin pull HIGH during normal operation. |
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| 21 | FR | O | This pin is No Connection pins. Nothing should be connected to this pin. This pin should be left open individually. | ||||||||||
| 22 | IREF | I | Current Reference for Brightness Adjustment This pin is segment current reference pin. A resistor should be connected between this pin and VSS. Set the current lower than 10uA. |
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| 23 | N.C. | - | Reserved Pin The N.C. pin between function pins are reserved for compatible and flexible design. |
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| 24 | VDDIO | P | Power Supply for I/O Pin It should be matched with the MCU interface voltage level. |
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| 25 | VDD | P | Power Supply for Core Logic Circuit Power supply pin for core logic operation. A capacitor is required to connect between this pin and VSS |
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| 26 | VCI | P | Power Supply for Operation VCI must always be equal to or higher than VDD and VDDIO. |
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| 27 | VSL | P | Voltage Output Low Level for SEG Signal This is segment voltage reference pin. When external VSL is not used, this pin should be left open. When external VSL is used, this pin should connect with resistor and diode to ground. |
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| 28 | VLSS | P | Ground of Analog Circuit These are the analog ground pins. They should be connected to VSS externally. |
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| 29 | VCC | P | Power Supply for OLED Panel These are the most positive voltage supply pin of the chip. They must be connected to external source. |
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| 30 | ESD GND | P | Ground |
| パラメーター | 記号 | 最小値 | 最大値 | 単位 |
|---|---|---|---|---|
| ロジック電源電圧 | VDD | -0.5 | 2.75 | V |
| 低電圧電源 | VCI | -0.3 | 4.0 | V |
| I/Oピンの電源電圧 | VDDIO | -0.5 | VCI | V |
| ディスプレイ電源電圧 | VCC | -0.5 | 20 | V |
| 操作温度 | TOP | -40 | 80 | °C |
| 保存温度 | TSTG | -40 | 85 | °C |
| 項目 | 記号 | 条件 | 最小値 | 典型値 | 最大値 | 単位 |
|---|---|---|---|---|---|---|
| 低電圧電源 | VCI | － | 2.4 | 3.3 | 3.5 | V |
| ディスプレイ電源電圧 | VCC | － | 10.0 | 16.0 | 16.5 | V |
| ロジック電源電圧 | VDD | － | 2.4 | － | 2.6 | V |
| I/Oピンへの電源 | VDDIO | － | 1.65 | VCI | V | |
| 高レベル入力 | VIH | － | 0.8×VDDIO | － | VDDIO | V |
| 低レベル入力 | VIL | － | 0 | － | 0.2×VDDIO | V |
| 高レベル出力 | VOH | － | 0.9×VDDIO | － | VDDIO | V |
| 低レベル出力 | VOL | － | 0 | － | 0.1×VDDIO | V |
| 50% ボードの動作電流をチェック | VCC =16 V | - | 35 | 55 | mA | |
