- 規格説明
- ピン配置
- 外形図
- 絶対最大定格
- 電気特性
| 項目 | 仕様 | 単位 |
|---|---|---|
| 構造 | COG | |
| サイズ(対角線) | 3.55 | インチ |
| ドットマトリックス / 解像度 | 256 × 64 | ドット |
| モジュール寸法 | 99.20 × 33.50 × 2.01 | mm |
| ビューイングエリア(VA) | 89.52 × 23.28 | mm |
| アクティブエリア(AA) | 87.52 × 21.28 | mm |
| ドットサイズ | 0.312 × 0.303 | mm |
| ドットピッチ | 0.342 × 0.333 | mm |
| 表示色 | OLED, 白色 | |
| グレースケールをサポートする | あり | |
| ディスプレモード | パッシブマトリクス (Passive Matrix) | |
| グレースケール | 4-bit | |
| IC | SSD1363 | |
| インターフェス | 6800,8080,4-wire SPI,I2C | |
| タッチパネル | なし | |
| 供給電圧 | 3V | |
| Duty | 1/64 duty | |
| 操作温度 | -40~+80 | °C |
| 保存温度 | -40~+85 | °C |
| タイプ | グラフィック型 OLED モジュール |
| Pin No. | 記号 | 功能 | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | ESD_GND | ESD Ground pin | |||||||||||||||
| 2 | VSS | Ground pin. It must be connected to external ground. | |||||||||||||||
| 3 | VCC | Power supply for panel driving voltage. This is also the most positive power voltage supply pin. A capacitor should be connected between this pin and VSS. |
|||||||||||||||
| 4 | VCOMH | COM signal deselected voltage level. A capacitor should be connected between this pin and VSS. |
|||||||||||||||
| 5 | VLSS | Analog system ground pin. It must be connected to external ground. | |||||||||||||||
| 6 | D7 | These pins are bi-directional data bus connecting to the MCU data bus. Unused pins are recommended to tie LOW. When serial interface mode is selected, D2, D1 should be tied together as the serial data input: SDIN, and D0 will be the serial clock input: SCLK. When I2C mode is selected, D2, D1 should be tied together and serve as SDAout, SDAin in application and D0 is the serial clock input, SCL. |
|||||||||||||||
| 7 | D6 | ||||||||||||||||
| 8 | D5 | ||||||||||||||||
| 9 | D4 | ||||||||||||||||
| 10 | D3 | ||||||||||||||||
| 11 | D2 | ||||||||||||||||
| 12 | D1 | ||||||||||||||||
| 13 | D0 | ||||||||||||||||
| 14 | E(RD#) | This pin is MCU interface input. When 6800 interface mode is selected, this pin will be used as the Enable (E) signal. Read/write operation is initiated when this pin is pulled HIGH and the chip is selected. When 8080 interface mode is selected, this pin receives the Read (RD#) signal. Read operation is initiated when this pin is pulled LOW and the chip is selected. When serial or I2C interface is selected, this pin must be connected to VSS. |
|||||||||||||||
| 15 | R/W# (WR#) | This pin is read / write control input pin connecting to the MCU interface. When 6800 interface mode is selected, this pin will be used as Read/Write (R/W#) selection input. Read mode will be carried out when this pin is pulled HIGH and write mode when LOW. When 8080 interface mode is selected, this pin will be the Write (WR#) input. Data write operation is initiated when this pin is pulled LOW and the chip is selected. When serial or I2C interface is selected, this pin must be connected to VSS. |
|||||||||||||||
| 16 | BS1 | MCU bus interface selection pins. Select appropriate logic setting as described in the following table. BS2 and BS1 are pin select.
(1) 0 is connected to VSS (2) 1 is connected to VDD |
|||||||||||||||
| 17 | BS2 | ||||||||||||||||
| 18 | D/C# | This pin is Data/Command control pin connecting to the MCU. When the pin is pulled HIGH, the data at D[7:0] will be interpreted as data. When the pin is pulled LOW, the data at D[7:0] will be transferred to a command register. In I2C mode, this pin acts as SA0 for slave address selection. |
|||||||||||||||
| 19 | CS# | This pin is the chip select input connecting to the MCU. The chip is enabled for MCU communication only when CS# is pulled LOW (active LOW). |
|||||||||||||||
| 20 | RES# | This pin is reset signal input. When the pin is pulled LOW, initialization of the chip is executed. Keep this pin pull HIGH during normal operation. |
|||||||||||||||
| 21 | FR | This pin outputs RAM write synchronization signal. Proper timing between MCU data writing and frame display timing can be achieved to prevent tearing effect. It should be kept NC if it is not used. |
|||||||||||||||
| 22 | IREF | This pin is the segment output current reference pin. IREF is supplied externally. A resistor should be connected between this pin and VSS to maintain the current around 10uA. It should be kept floating when internal IREF is chosen by command setting. |
|||||||||||||||
| 23~24 | NC | This is dummy pin. It should be kept NC. | |||||||||||||||
| 25 | VP | This pin is the segment pre-charge voltage reference pin. A capacitor can be connected between this pin and VSS to improve visual performance. It can also be float per application. No external power supply is allowed to connect to this pin. |
|||||||||||||||
| 26 | VDD | Power supply pin for core logic operation. A capacitor should be connected between this pin and VSS. | |||||||||||||||
| 27 | VSL | This is segment voltage (output low level) reference pin. This pin has to be connected with resistor and diode to ground (details depends on application). |
|||||||||||||||
| 28 | VLSS | Analog system ground pin. It must be connected to external ground. | |||||||||||||||
| 29 | VCC | Power supply for panel driving voltage. This is also the most positive power voltage supply pin. A capacitor should be connected between this pin and VSS. |
|||||||||||||||
| 30 | ESD_GND | ESD Ground pin |
| パラメーター | 記号 | 最小値 | 最大値 | 単位 |
|---|---|---|---|---|
| 供給電圧 | VDD | -0.3 | 4.0 | V |
| 供給電圧 | VCC | -0.5 | 19.0 | V |
| 操作温度 | TOP | -40 | +80 | °C |
| 保存温度 | TSTG | -40 | +85 | °C |
DC 電気特性
| 項目 | 記号 | 条件 | 最小値 | 典型値 | 最大値 | 単位 |
|---|---|---|---|---|---|---|
| 低電圧電源, 入力/出力ピンの電源電圧 |
VDD | － | 1.65 | 3.0 | 3.3 | V |
| 操作電圧 | VCC | － | 8.0 | 16.0 | 16.5 | V |
| 高レベル入力 | VIH | － | 0.8×VDD | － | VDD | V |
| 低レベル入力 | VIL | － | 0 | － | 0.2×VDD | V |
| 高レベル出力 | VOH | － | 0.9×VDD | － | VDD | V |
| 低レベル出力 | VOL | － | 0 | － | 0.1×VDD | V |
| ディスプレイ50%ピクセルオン | ICC | VCC =16V | － | 30 | 45 | mA |
